The present invention relates to the field of electrical devices, and, more particularly, to a circuit for controlling a reference node in a sense amplifier.
Sense amplifiers are commonly used in several applications, such as for reading cells of a non-volatile memory device, for example. A sense amplifier includes a circuit that detects a low-level signal and compares it with a pre-set reference voltage. The sense amplifier outputs a signal having two different values according to the result of the comparison.
Typically, the sense amplifier enters a stand-by condition or mode after a pre-set period has lapsed from a last reading operation. In particular, most of the elements of the sense amplifier are switched off (bringing a reference node providing the reference voltage to a power supply reference value, or ground), to reduce the power consumption of the device in which the sense amplifier is embedded. This also serves to reduce stress on the reference cells commonly used for generating the reference voltage.
When the sense amplifier is used in high performance devices, such as non-volatile memories with an access time lower than a few tens of ns, for example, it is very important to bring the voltage at the reference node back to its working value as quickly as possible after exiting a stand-by mode. In this case, the reference node is pre-charged in the stand-by mode to improve a dynamic response of the sense amplifier. Particularly, the reference node is connected to the central tap of a voltage divider providing a pre-charging voltage having a value close to the reference voltage.
Yet, the reference node is generally associated with a stray capacitor having a non-negligible capacitance. Therefore, its pre-charging under the action of the voltage divider is very slow since the voltage divider has to provide a low power consumption in the stand-by mode. This problem is particularly acute in a flash electrically erasable programmable read only memory (EEPROM), where a single reference node is used for all the sense amplifiers of the device. The single reference node is then associated with a stray capacitor having a relatively high capacitance defined by all of the memory cells.
A known prior art approach for speeding up the pre-charging process includes connecting the reference node to a capacitor charged at a power supply voltage upon entry into the stand-by mode. In this way, if the capacitor is suitably dimensioned, the reference node is instantaneously brought to the pre-charging voltage by charge sharing between this capacitor and the stray capacitor associated with the reference node.
A drawback of this prior art pre-charging circuit is that its operation is totally dependent on the stray capacitance associated with the reference node. Yet, it is very difficult (if not impossible) to estimate this value with precision. As a result, when the pre-charging circuit is not dimensioned correctly, the reference node is brought to a voltage that is quite different from the desired value. Therefore, the reference node will reach the pre-charging voltage very slowly and only under the action of the voltage divider.
Moreover, if the sense amplifier exits from the stand-by mode before completion of the aforementioned transient process, the voltage at the reference node will be at a value different from the expected one. In addition, the voltage at the reference node will vary widely according to the length of the stand-by mode. This causes spikes and surges which increase the time needed for the voltage at the reference node to reach its correct value upon exiting the stand-by mode.
It is an object of the present invention to overcome the above-mentioned drawbacks, i.e., to provide desired pre-charging in a relatively short period of time.
This and other object, features, and advantages in accordance with the invention are provided by a circuit for controlling a reference node in a sense amplifier that is switchable between an operating mode and a stand-by mode, where the reference node provides a reference voltage in the operating mode. The circuit may include means or circuitry for bringing the reference node to a starting voltage upon entry into the stand-by mode, first means or circuitry for keeping the reference node at a pre-charging voltage in the stand-by mode, and second means or circuitry for providing a comparison voltage closer to the pre-charging voltage than the starting voltage. The circuit may also include pulling means or circuitry for pulling the reference node toward a power supply voltage, and control means or circuitry for activating the pulling means upon entry into the stand-by mode and for disabling the pulling means when the voltage at the reference node reaches the comparison voltage.
Moreover, the present invention also provides a sense amplifier including a circuit as briefly described above, as well as a non-volatile memory device including such a sense amplifier. The invention also provides a corresponding method of controlling a reference node in a sense amplifier.